Discrete Rate Simulation was created by Andrew Siprelle in 1990.

The rate-based simulation paradigm that today underpins ReliaSim, the Decoupling Buffer Simulator, and the discrete rate modules used by tens of thousands of practitioners worldwide started in one place: a 1990 modeling problem in which traditional discrete event simulation broke down at production speed. Andrew Siprelle created both the technique and its original name — bulk flow simulation — which would later be renamed discrete rate simulation as the technique was adopted into commercial simulation software. This is how it came to be.

1990: The three primitives

Discrete event simulation, the dominant paradigm at the time, modeled every individual unit moving through a system as its own event. On a slow line — a few units per minute — that worked. On a real production line — hundreds or thousands of units per minute, with high-frequency micro-stops cascading downstream — discrete event models slowed to a crawl, averaged away the very dynamics that mattered, and validated at low speeds only to fail at scale.

In 1990, Andrew Siprelle introduced a different decomposition: instead of tracking units, model flow as a rate, and capture the system with just three primitives.

Constraints — points in the system that limit the rate of flow.
Buffers — accumulators that absorb mismatches between upstream and downstream rates.
Interrupts — events that modify rate (failures, changeovers, quality stops), each with their own time-to-failure and time-to-repair distributions.

Between interrupt events, the rate is constant — the system needs no recalculation. When something changes, the flow is recomputed in closed form. That single shift made high-speed lines tractable to simulate accurately for the first time.

1995: The first paper

The paradigm entered the academic record at the 1995 Winter Simulation Conference with Modeling a Bulk Manufacturing System Using Extend — the foundational paper. It demonstrated the three-primitive approach on a real bulk-flow production problem and made the case that rate-based modeling was not a special-purpose hack but a general paradigm.

1995–2020: The peer-reviewed record

Twenty-five years of papers extending, benchmarking, and validating the discrete rate approach:

From bulk flow to discrete rate

For most of its first two decades, the paradigm wasn't called discrete rate simulation. Andy's original framing — and the framing of every foundational paper in the 1990s — was bulk flow simulation. The 1995 paper is Modeling a Bulk Manufacturing System Using Extend. The 1997 follow-up is Simulation of Bulk Flow and High Speed Operations. The framework Andy released through Simulation Dynamics, Inc. in the late 1990s carried the SDI Industry name.

The rename to discrete rate simulation appears to have crystallized in the late 2000s as the technique was productized into commercial simulation software. The earliest peer-reviewed paper title to use the new name appears to be Krahl's Discrete Rate Simulation Using Linear Programming at the 2008 Winter Simulation Conference — by which point Andy's bulk-flow architecture had been incorporated into ExtendSim as an "Advanced Technology" module.

The technique did not change. The name did. The three-primitive decomposition — constraints, buffers, interrupts — that Andrew Siprelle created in 1990 is the same paradigm under either name.

What it became

The discrete rate paradigm now ships as a core module of commercial simulation platforms, has been the basis of academic research at the Winter Simulation Conference and in Springer proceedings for three decades, and is used by tens of thousands of practitioners worldwide — in manufacturing, in healthcare patient-flow modeling, in logistics planning, in process industries.

The next generation

Today, the work continues at ChiAha, where the discrete rate paradigm powers a family of modern tools:

ReliaSim — manufacturing-deep simulation validated within 1% OEE, with TTF/TTR distributions, blocking and starvation analysis, and Gain ≠ Loss experimentation.
Decoupling Buffer Simulator — a free, browser-based discrete rate model for exploring how buffers absorb upstream failures and decouple downstream starvation.
Understanding Throughput — the companion textbook in progress, written against the paradigm.

About Andrew Siprelle

Founder of ChiAha. Inventor of Discrete Rate Simulation. Thirty-five years applying simulation, operations research, and high-performance computing to real industrial systems — the kind of work where the answer has to validate against the line, not just against a benchmark. Author of the foundational 1995 WSC paper, the 2009 ExtendSim Advanced Technology paper, the 2014 Global Approach methodology paper, and co-author of the 2020 WSC validation paper with Tom Lange.